The present invention relates generally to a semiconductor package, and more particularly, to a semiconductor package suitable for stacking a plurality of semiconductor packages and a stack semiconductor package having the same.
Stack semiconductor packages have been developed, in which at least two memory semiconductor chips are stacked so as to increase a data storage capacity.
Also, a semiconductor chip capable of storing and processing a huge amount of data within a short time and a semiconductor package including the semiconductor chip have been developed. Further, the development of a stack semiconductor package, in which at least two memory semiconductor chips and a system semiconductor chip are stacked so as to improve not only a data storage capacity but also a data processing speed, has been an area of recent interest.
In general, a semiconductor chip has center bonding pads disposed in one line or two lines on the center portion of the semiconductor chip or edge bonding pads disposed adjacent to the edges of the semiconductor chip.
In the case of a semiconductor chip having edge bonding pads, at least two semiconductor chips can be easily stacked and can be easily connected electrically with each other using bonding wires. However, it is difficult to stack multiple semiconductor chips when the semiconductor chips have center bonding pads, and such a configuration can lead to various problems.
In detail, when semiconductor chips having center bonding pads are stacked and electrically connected using bonding wires, the lengths of the bonding wires for connecting the connection pads of a substrate, on which the semiconductor chips are mounted, with the center bonding pads of the semiconductor chips are increased, and therefore the likelihood of short-circuits of bonding wires is increased, and the operating speeds of the semiconductor chips are likely to decrease.
In order to solve these problems, technologies have been developed in which redistribution lines or through-electrodes are formed on or through the semiconductor chips having the center bonding pads. Nevertheless, in these technologies, because a number of subsequent processes must be conducted to form the redistribution lines and the through-electrodes, the number of processes for manufacturing a semiconductor package increases, and the manufacturing cost of the semiconductor package rises.